TY - GEN

T1 - Temporal vectorization

T2 - 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022

AU - Johnsen, Carl Johannes

AU - De Matteis, Tiziano

AU - Ben-Nun, Tal

AU - De Fine Licht, Johannes

AU - Hoefler, Torsten

N1 - Publisher Copyright: © 2022 Association for Computing Machinery.

PY - 2022

Y1 - 2022

N2 - The multi-pumping resource sharing technique can overcome the limitations commonly found in single-clocked FPGA designs by allowing hardware components to operate at a higher clock frequency than the surrounding system. However, this optimization cannot be expressed in high levels of abstraction, such as HLS, requiring the use of hand-optimized RTL. In this paper we show how to leverage multiple clock domains for computational subdomains on reconfigurable devices through data movement analysis on high-level programs.We offer a novel view on multi-pumping as a compiler optimization - a superclass of traditional vectorization. As multiple data elements are fed and consumed, the computations are packed temporally rather than spatially. The optimization is applied automatically using an intermediate representation that maps high-level code to HLS. Internally, the optimization injects modules into the generated designs, incorporating RTL for finegrained control over the clock domains. We obtain a reduction of resource consumption by up to 50% on critical components and 23% on average. For scalable designs, this can enable further parallelism, increasing overall performance.

AB - The multi-pumping resource sharing technique can overcome the limitations commonly found in single-clocked FPGA designs by allowing hardware components to operate at a higher clock frequency than the surrounding system. However, this optimization cannot be expressed in high levels of abstraction, such as HLS, requiring the use of hand-optimized RTL. In this paper we show how to leverage multiple clock domains for computational subdomains on reconfigurable devices through data movement analysis on high-level programs.We offer a novel view on multi-pumping as a compiler optimization - a superclass of traditional vectorization. As multiple data elements are fed and consumed, the computations are packed temporally rather than spatially. The optimization is applied automatically using an intermediate representation that maps high-level code to HLS. Internally, the optimization injects modules into the generated designs, incorporating RTL for finegrained control over the clock domains. We obtain a reduction of resource consumption by up to 50% on critical components and 23% on average. For scalable designs, this can enable further parallelism, increasing overall performance.

UR - http://www.scopus.com/inward/record.url?scp=85145664538&partnerID=8YFLogxK

U2 - 10.1145/3508352.3549374

DO - 10.1145/3508352.3549374

M3 - Article in proceedings

AN - SCOPUS:85145664538

SP - 1

EP - 9

BT - Proceedings of the 41st IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2022

PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 30 October 2022 through 4 November 2022

ER -