Standard
Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC. / Camplani, A.; Dittmeier, S.; Annovi, A.; Axiotis, K.; Beccherle, R.; Biesuz, N.; Brenner, R.; Débieux, S.; Ellert, M.; Francavilla, P.; Giannetti, P.; Kordas, K.; Mårtensson, M.; Mastrandrea, P.; Noulas, C.; Oechsle, J.; Piendibene, M.; Poggi, R.; Schöning, A.; Sfyrla, A.; Sotiropoulou, C.l.; Steentoft, J.; Tsiakiris, T.; Xella, S.; Zinßer, J.
In:
Journal of Instrumentation, Vol. 18, No. 06, P06029, 01.06.2023.
Research output: Contribution to journal › Journal article › Research › peer-review
Harvard
Camplani, A, Dittmeier, S, Annovi, A, Axiotis, K, Beccherle, R, Biesuz, N, Brenner, R, Débieux, S, Ellert, M, Francavilla, P, Giannetti, P, Kordas, K, Mårtensson, M, Mastrandrea, P, Noulas, C, Oechsle, J, Piendibene, M, Poggi, R, Schöning, A, Sfyrla, A, Sotiropoulou, CL, Steentoft, J, Tsiakiris, T
, Xella, S & Zinßer, J 2023, '
Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC',
Journal of Instrumentation, vol. 18, no. 06, P06029.
https://doi.org/10.1088/1748-0221/18/06/P06029
APA
Camplani, A., Dittmeier, S., Annovi, A., Axiotis, K., Beccherle, R., Biesuz, N., Brenner, R., Débieux, S., Ellert, M., Francavilla, P., Giannetti, P., Kordas, K., Mårtensson, M., Mastrandrea, P., Noulas, C., Oechsle, J., Piendibene, M., Poggi, R., Schöning, A., ... Zinßer, J. (2023).
Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC.
Journal of Instrumentation,
18(06), [P06029].
https://doi.org/10.1088/1748-0221/18/06/P06029
Vancouver
Camplani A, Dittmeier S, Annovi A, Axiotis K, Beccherle R, Biesuz N et al.
Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC.
Journal of Instrumentation. 2023 Jun 1;18(06). P06029.
https://doi.org/10.1088/1748-0221/18/06/P06029
Author
Camplani, A. ; Dittmeier, S. ; Annovi, A. ; Axiotis, K. ; Beccherle, R. ; Biesuz, N. ; Brenner, R. ; Débieux, S. ; Ellert, M. ; Francavilla, P. ; Giannetti, P. ; Kordas, K. ; Mårtensson, M. ; Mastrandrea, P. ; Noulas, C. ; Oechsle, J. ; Piendibene, M. ; Poggi, R. ; Schöning, A. ; Sfyrla, A. ; Sotiropoulou, C.l. ; Steentoft, J. ; Tsiakiris, T. ; Xella, S. ; Zinßer, J. / Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC. In: Journal of Instrumentation. 2023 ; Vol. 18, No. 06.
Bibtex
@article{d5cd979747b442ac8926c4e0b454e6af,
title = "Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC",
author = "A. Camplani and S. Dittmeier and A. Annovi and K. Axiotis and R. Beccherle and N. Biesuz and R. Brenner and S. D{\'e}bieux and M. Ellert and P. Francavilla and P. Giannetti and K. Kordas and M. M{\aa}rtensson and P. Mastrandrea and C. Noulas and J. Oechsle and M. Piendibene and R. Poggi and A. Sch{\"o}ning and A. Sfyrla and C.l. Sotiropoulou and J. Steentoft and T. Tsiakiris and S. Xella and J. Zin{\ss}er",
year = "2023",
month = jun,
day = "1",
doi = "10.1088/1748-0221/18/06/P06029",
language = "English",
volume = "18",
journal = "Journal of Instrumentation",
issn = "1748-0221",
publisher = "Institute of Physics Publishing Ltd",
number = "06",
}
RIS
TY - JOUR
T1 - Intel Stratix 10 FPGA design for track reconstruction for the ATLAS experiment at the HL-LHC
AU - Camplani, A.
AU - Dittmeier, S.
AU - Annovi, A.
AU - Axiotis, K.
AU - Beccherle, R.
AU - Biesuz, N.
AU - Brenner, R.
AU - Débieux, S.
AU - Ellert, M.
AU - Francavilla, P.
AU - Giannetti, P.
AU - Kordas, K.
AU - Mårtensson, M.
AU - Mastrandrea, P.
AU - Noulas, C.
AU - Oechsle, J.
AU - Piendibene, M.
AU - Poggi, R.
AU - Schöning, A.
AU - Sfyrla, A.
AU - Sotiropoulou, C.l.
AU - Steentoft, J.
AU - Tsiakiris, T.
AU - Xella, S.
AU - Zinßer, J.
PY - 2023/6/1
Y1 - 2023/6/1
U2 - 10.1088/1748-0221/18/06/P06029
DO - 10.1088/1748-0221/18/06/P06029
M3 - Journal article
VL - 18
JO - Journal of Instrumentation
JF - Journal of Instrumentation
SN - 1748-0221
IS - 06
M1 - P06029
ER -
