Quantum Photonics Seminar: Louise Floor Frellsen

Title: Topology optimization for compact on-chip silicon devices

Topology optimization is an iterative inverse design tool. It originates from the field of mechanics, but in the last decade it has been used for the design of compact nanophotonic devices based on complex scattering mechanisms. The method works through material redistribution and achieves unintuitive structures with no unnecessary geometrical constraints. This results in devices with record small footprint, such as a 4.4 µm x 2.8 µm TE₀ and TE₁ mode multiplexer with an insertion loss of less than 1.3 dB for more than a 100 nm bandwidth. When designing components for photonics integrated circuits, there is, however, a trade-off between footprint and performance. This relation is investigated for the topology optimization technique, through simulations on a wavelength multiplexer system, to map out the benefits and challenges of the method.