Making CSB+-Tree Processor Conscious
Research output: Chapter in Book/Report/Conference proceeding › Book chapter › Research
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Making CSB+-Tree Processor Conscious. / Samuel, Michael; Pedersen, Anders Uhl; Bonnet, Philippe.
First International Workshop on Data Management on New Hardware. ACM, 2005.Research output: Chapter in Book/Report/Conference proceeding › Book chapter › Research
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TY - CHAP
T1 - Making CSB+-Tree Processor Conscious
AU - Samuel, Michael
AU - Pedersen, Anders Uhl
AU - Bonnet, Philippe
PY - 2005
Y1 - 2005
N2 - Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager.
AB - Cache-conscious indexes, such as CSB+-tree, are sensitive to the underlying processor architecture. In this paper, we focus on how to adapt the CSB+-tree so that it performs well on a range of different processor architectures. Previous work has focused on the impact of node size on the performance of the CSB+-tree. We argue that it is necessary to consider a larger group of parameters in order to adapt CSB+-tree to processor architectures as different as Pentium and Itanium. We identify this group of parameters and study how it impacts the performance of CSB+-tree on Itanium 2. Finally, we propose a systematic method for adapting CSB+-tree to new platforms. This work is a first step towards integrating CSB+-tree in MySQL’s heap storage manager.
KW - Faculty of Science
KW - storage management
KW - cache conscious processing
M3 - Book chapter
BT - First International Workshop on Data Management on New Hardware
PB - ACM
ER -
ID: 86967